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  ? semiconductor components industries, llc, 2016 july, 2016 ? rev. 1 1 publication order number: MC100LVELT20/d MC100LVELT20 3.3v?lvttl/lvcmos to differential lvpecl translator description the MC100LVELT20 is a 3.3 v ttl/cmos to differential pecl translator. becau se pecl (positive ecl) levels are used, only + 3.3 v and ground are required. the small outline soic ? 8 package and the single gate of the MC100LVELT20 makes it ideal for those applications where space, performance, and low power are at a premium. the 100 series contains temperature compensation. features ? 390 ps typical propagation delay ? maximum input clock frequency > 0.8 ghz typical ? operating range v cc = 3.0 v to 3.6 v with gnd = 0 v ? pnp ttl input for minimal loading ? q output will default high with input open ? these devices are pb-free, halogen free and are rohs compliant a = assembly location l = wafer lot y = year w = work week  = pb-free package marking diagram soic ? 8 nb d suffix case 751 ? 07 www.onsemi.com kvt20 alyw  1 8 1 8 *for additional marking information, refer to application note and8002/d . ?for information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d . ordering information device package shipping ? mc100lvel t20dg soic ? 8 nb (pb-free) 98 units/tube MC100LVELT20dr2g soic-8 nb (pb-free) 2500/tape & reel
MC100LVELT20 www.onsemi.com 2 1 2 3 45 6 7 8 d gnd v cc q nc q nc nc lvttl lvpecl figure 1. 8-lead pinout and logic diagram (top view) table 1. pin description pin function q, q differential pecl outputs d lvttl input v cc positive supply gnd ground nc no connect table 2. attributes characteristics value internal input pulldown resistor n/a internal input pullup resistor n/a esd protection human body model machine model charged device model > 1.5 kv > 200 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1) pb-free pkg soic ? 8 nb level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 150 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d . table 3. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc power supply gnd = 0 v 6 v v i input voltage gnd = 0 v v i v cc 6 v i out output current continuous surge 50 100 ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c  ja thermal resistance (junction-to-ambient) 0 lfpm 500 lfpm soic ? 8 nb 190 130 c/w  jc thermal resistance (junction-to-case) standard board soic ? 8 nb 41 to 44 c/w t sol wave solder (pb-free) 265 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected.
MC100LVELT20 www.onsemi.com 3 table 4. lvttl input dc characteristics (v cc = 3.3 v, gnd = 0 v, t a = ? 40 c to +85 c) symbol characteristic min typ max unit i ih input high current (v in = 2.7 v) 20  a i ihh input high current max (v in = 6.0 v) 100  a i il input low current (v in = 0.5 v) ? 0.6 ma v ik input clamp voltage (i in = ? 18 ma) ? 1.2 v v ih input high voltage 2.0 v v il input low voltage 0.8 v note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. table 5. 100lvelt pecl output dc characteristics (v cc = 3.3 v, gnd = 0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i cc negative power supply current 20 25 30 22 27 32 23 28 33 ma v oh output high voltage (note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mv v ol output low voltage (note 2) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mv note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. output parameters vary 1:1 with v cc . 2. all loading with 50  to v cc ? 2.0 v. table 6. ac characteristics (v cc = 3.0 v to 3.6 v, gnd = 0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max f max maximum input clock frequency (figure 2) 600 800 600 800 600 800 mhz t plh , t phl propagation delay to output differential 280 350 430 300 370 450 320 400 490 ps t skew device-to-device skew (note 2) 250 250 250 ps t jitter random clock jitter (rms) (figure 2) < 1 < 2 < 1 < 2 < 1 < 2 ps t r t f output rise/fall times q, q (20% ? 80%) 70 100 225 80 120 225 90 140 225 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. measured using a lvttl source, 50% duty cycle clock source. all loading with 50  to v cc ? 2.0 v. 2. skew is measured between outputs under identical transitions.
MC100LVELT20 www.onsemi.com 4 1 2 3 4 5 6 7 8 9 input clock frequency (mhz) jitter random clock jitter (ps rms) figure 2. output voltage amplitude (v outpp )/rms jitter vs. input clock frequency at ambient temperature output voltage amplitude (mv) 0 200 400 600 800 1000 900 800 700 600 500 400 300 200 100 0 amplitude figure 3. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50  z o = 50  50  50  v tt v tt = v cc ? 2.0 v
MC100LVELT20 www.onsemi.com 5 resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps  i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
MC100LVELT20 www.onsemi.com 6 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m  1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155  mm inches  scale 6:1 for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d .* soldering footprint* on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 MC100LVELT20/d eclinps is a registered trademark of semiconductor components industries, llc (scillc) or its subsidiaries in the united state s and/or other countries. literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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